본 강의는 풀커스텀방식 반도체 설계 분야에 진출하고자하는 입문자를 대상으로 풀커스텀 회로에 대한 이해와 설계환경 구축, CAD Tool 사용, 설계 flow, 회로 구현, 설계검증, 칩레벨 설계, 및 최종 DB 출력을 아우르는 현장에서와 동등한 수준의 전문적 설계경험을 제공하고자 개설되었으며 이러한 과정을 통해 풀커스텀방식의 설계 역량 배양과 산업현장에서의 실질적 문제해결 능력을 갖추는 것을 목표로 한다.
This course is designed to provide beginners who wish to enter the field of full-custom IC design with professional design experience equivalent to that in the field, covering understanding of full-custom design methodology, design environment, CAD tool use, design flow, circuit implementation, design verification, chip-level design, and final DB hand-out. The goal is to cultivate full-custom design capabilities and acquire practical problem-solving skills in industrial settings through this course.

학과입문(반도체 공학과), 전자회로 I
Introduction to Semiconductor Engineering, Electronic Circuts-1

- 평가방법: 4~5개 가량의 실습과제를 통해 평가
- 점수 반영 비율(%): 과제(90%), 수업활동(10%)
- Evaluation through 4~5 practical tasks
- Assignment (90%), Class activities (10%)

Jacob Baker: CMOS circuit design, layout, and simulation, IEEE Press, 2019.
Jan. M. Babaey: Digital Integrated Circuits: A Design Perspective, Prentice Hall, 2003.
Neil H.E. Weste: CMOS VLSI Design: A Circuits and Systems Perspective, Pearson, 2010.
Gabriel A. Rincon-Mora: Analog IC design with low-dropout regulators, McGraw-Hill, 2009.
Behazad Razavi: Design of Analog CMOS Integrated Circuits, McGraw Hill, 2017.
Kenneth S. Kundert, Olaf Zinke: The design guide to Verilog AMS, Springer, 2004.
Cadence online manual.

- wk 1~2: Full-custom design environment and CAD tools
- wk 3~5: Inverter chain design and PDP(power-delay) optimization
- wk 6-7: SRAM circuits and operations (6T-cell, Sense amplifier, Decoders, In/out driver, etc.)
- wk 8-9: SRAM column structure design (Hierarchical design, Column structure, self-timed sensing, critical-path modeling)
- wk 10-11: Chip-level IC design (PAD cell, ESD, Latch-up, Antenna rule, IR-drop, Noise isolation, Dummy, TO)
- wk 12-13: Voltage regulator circuits (Low-dropout regulators, performance and stability)
- wk 14-16: Behavioral modeling of analog circuits (Verilog-A modeling, library porting)

- 강의/실습 관련 문의: 이경수 교수 (kyongsul@postech.ac.kr)
- 이론강의와 실습을 병행하며 진행
- 과제 중심의 성과 평가
- Lecture/project related inquiries: Kyongsu Lee, Ph.D. (kyongsul@postech.ac.kr)
- This course is conducted with lectures and practical training in parallel.
- Task-based performance evaluation

-강의유형: 대면강의
-대학원생 수강은 원칙적으로 제한되며 필요시 담당교수의 동의가 필요함
-교수/학습방법: 이론강의, 실습 및 독립적 과제 수행
- 정원이 초과하는 경우 심사를 통해 수강거절할 수 있음
- Face-to face lecture in the classroom
- Graduate student registration requires the consent of the professor in charge
- Lectures, practical training and independent assignments
- In case the number of student exceeds facility capacity, unqualified students may not be accepted.